This book discusses in detail the issues relating to both hardware and software design of coarse grain reconfigurable architectures, which can deliver high performance with less energy consumption as the hardware adjusts dynamically for the given application.  Techniques are described with which the micro-architecture can be re-structured at the level of groups of operations instead of individual operations as in fine grain reconfiguration.  Using embedded applications with high performance demands as motivation, the book takes the reader step-by-step through state-of-the-art approaches, from defining the architecture, to designing execution-driven optimizations, to realization of the architecture on silicon.  Empirical results are shown for various, real applications.

Hersteller:
Springer Verlag GmbH
juergen.hartmann@springer.com
Tiergartenstr. 17
DE 69121 Heidelberg

Introduction.- Review of reconfigurable architectures.- A Systems Approach to defining a Coarse Grain Reconfigurable Architecture.- The role of a high throughput interconnect.- Application Synthesis.- Spatial Partitioning.- Mapping and Consolidated Results.- System Performance Considerations.- Epilogue.